The present invention relates to a semiconductor design technology; and, more particularly, to an apparatus and a method for detecting a failure of data in the semiconductor memory device.
Generally, the major operation of the DRAM which has been widely used in the semiconductor memory device is to read data from a memory cell and write data to a memory cell. Therefore, it is very important to effectively test the read/write operation. That is, when data are written or read out in response to the same address signal and there is a difference between the read-out data and the written data because of a data failure, it is important to find out where the failure is in the memory cells.
When the test is carried out in the read or write operation of the memory cells, the various commands, such as active command, write command, precharge command, active command, read command and precharge command, are applied to the memory cells. Then, after the data are written to the memory cell and the memory cell is then precharged, a bit line charge sharing is caused by the read-out data from the memory cell.
However, it is difficult to find out whether there is the failure in the memory cell or in the peripheral circuit through the above-mentioned test. Accordingly, when the failure occurs in the memory device, the defect is detected by writing the data to a bit line sense amplifier of a bank and by reading out the data from the bit line sense amplifier through a conventional test of “WRITE VERIFIED READ.” That is, the commands are applied as follows: 1) activation, 2) write, 3) read, and 4) precharge. When data on the bit line sense amplifier are read out without the precharge operation after the write operation, there is a failure if the read-out data are the same as the write data.
Also, there is still a problem in that only the failure of the memory cell can be detected. It is very difficult to test a failure of data in the case where there is a defect in the bit line sensing amplifier or a local I/O line. That is, since there is no method for further subdividing the test area and testing it, it is difficult to concretely detect whether the failure is generated or not.